LSI-11 (1976)

The LSI-11 was DEC's first microprocessor. A co-development with Western Digital, the LSI-11's microarchitecture was designed by WD's Bill Roberts (who later founded Emulex). Duane Dickhut wrote the microcode, and Rich Olsen designed the module.

The LSI-11 broke with established PDP-11 precedents in several ways. The PSW was not accessible as location 0177776; instead, two new instructions (MFPS and MTPS) provided access. Floating point was done with a unique FIS instruction set. The LSI-11 module abandoned the Unibus in favor of a simpler structure, formally known as the LSI-11 bus but always referred to as the Qbus.

The LSI-11 consisted of three chips, one of which could be replicated: the microcode ROM (MICROM, up to three supported), the Control chip, and the Data chip. It was implemented in Western Digital's 7u NMOS process and operated at 3.3Mhz (300ns microcycle). Internally, the Data chip was an 8b microprocessor, double pumping the data path to execute the PDP-11 16b instructions.

Name Number Size Transistors Comments

Data 1611 184x209 5,000 The Data chip implememnts the instruction execution path of the LSI-11 chip set. The Data chip operates under the control of microwords fetched from the MICROM chips by the Control chip. Its key features are:

Execution data path
PDP-11 architectural general registers
Microcode temporary registers
Processor status word
Arithmetic/logic unit (8b)
Condition code logic

Power: 1.5W

Control 1621 197x205 8,000 The Control chip provides address generation for the MICROM chips and control for external data access. Its key features are:

Translation PLA's - four PLA's provide for instruction decoding
Chip set microsequencing
Interrupt logic

Power: 1.5W

MICROM 1631 162x172 10,000 The MICROM is a high speed 512 x 22b ROM which supplies microinstructions to the Data and Control chips under the direction of the Control chip. Up to four MICROMs are allowed in a system (DEC only used three). Two MICROM implement the base PDP-11 instruction set; a third is required to implement the extended (EIS) and floating (FIS) instruction sets.
Power: 1.5W.

Despite being the slowest PDP-11 ever produced, the LSI-11 was very successful, particularly after the "double" sized (5.25" x 8.5") module was introduced. Customers built LSI-11's into instruments, dropped them down oil wells, vaporized them in furnaces, etc. The success of the LSI-11 as a volume product, coupled with Western Digital's financial troubles in the late 70's, forced DEC to become a second source manufacturer of the chip set. This was the start of DEC's chip process development and manufacturing efforts, which spanned twenty years.

Updated 24-Feb-2008 by Bob Supnik (simh AT trailing-edge DOT com - anti-spam encoded)

Name	Number	Size	Transistors	Comments
Data	1611	184x209	5,000	The Data chip implememnts the instruction execution path of the LSI-11 chip set. The Data chip operates under the control of microwords fetched from the MICROM chips by the Control chip. Its key features are: Execution data path PDP-11 architectural general registers Microcode temporary registers Processor status word Arithmetic/logic unit (8b) Condition code logic Power: 1.5W
Control	1621	197x205	8,000	The Control chip provides address generation for the MICROM chips and control for external data access. Its key features are: Translation PLA's - four PLA's provide for instruction decoding Chip set microsequencing Interrupt logic Power: 1.5W
MICROM	1631	162x172	10,000	The MICROM is a high speed 512 x 22b ROM which supplies microinstructions to the Data and Control chips under the direction of the Control chip. Up to four MICROMs are allowed in a system (DEC only used three). Two MICROM implement the base PDP-11 instruction set; a third is required to implement the extended (EIS) and floating (FIS) instruction sets. Power: 1.5W.